Datum und Uhrzeit:
Ort: Seminar room OMZ (U013, INF 350, floor -1)
Title: Hardware-Software Codesign for embedded AI
Abstract: Artificial Intelligence (AI) applications are permeating large areas of business, science and society. Enabled by recent advances in algorithms, computer architectures and big data, AI has made significant breakthroughs in a wide range of applications. The trend in many domains is to shift intelligence from the cloud to the edge. However, integrating AI systems at the edge requires the development of powerful solutions under very tight resource constraints. The use of artificial intelligence (AI) in the Internet of Things (IoT) is primarily limited by energy consumption. Optimised hardware architectures are therefore essential to meet the requirements of such applications. Often, solutions exist that deliver very good results in the high-performance domain, but the use of AI approaches in embedded systems is still a major challenge. Although effective hardware-software codesign methods have been studied for decades, they are still not standard in the development of complex embedded systems, including integrated AI systems. The talk will provide insights into the use case of an intelligent learning device for automated handwriting, which demonstrates an extremely resource-constrained environment. Low-power hardware accelerators for various neural networks are developed, distributing the complexity of the overall system across both software and hardware, enabling fast and efficient AI execution.
CV: Tanja Harbaum studied computer science at the Karlsruhe Institute of Technology (KIT) with a focus on computer architectures and robotics. After graduation, she worked in high-energy physics experiments on trigger systems with extreme latency requirements, as well as researched reconfigurable microarchitectures. She completed her PhD in electrical engineering at KIT and since 2019 she has been a team leader at the “Institut fuer Technik der Informationsverarbeitung” (ITIV). Her research focuses on the design of novel computer architectures and artificial intelligence in embedded systems. Here, a focus is on hardware-software codesign, which allows fast and efficient AI execution on embedded systems. She is active in several conferences, including serving as Technical Program Chair for the IEEE International System-on-Chip Conference (SOCC) and as a TPC member for the Design Automation Conference (DAC) and the Design, Automation and Test in Europe Conference (DATE).