Datum und Uhrzeit:
Ort: Seminar room OMZ (U013, INF 350, floor -1)
Title: Livin’ on the Extreme Edge
Abstract: Extreme edge computing is critical for high-throughput scientific experiments. For example, the Compact Muon Solenoid (CMS) detector Large Hadron Collider generates immense data, necessitating efficient, low-latency processing. CMS has tens of thousands of ASICs and hundreds of FPGAs for real-time event triggering. Triggering uses fast machine learning (ML) algorithms to process 40 million collisions per second with sub-25-nanosecond latency, all while operating in an extreme radiation environment (1000x that of space!). When you’re “livin’ on the edge,” every nanosecond and every bit matters.
This talk discusses the challenges of designing custom hardware accelerators for extreme edge applications. Extreme edge computing requires careful co-design of ML algorithms and their hardware implementations to meet the stringent performance and fault-tolerance requirements. To address this, we developed FKeras and Arbolta, co-design sensitivity analysis tools that quantify the effects of faults on ML algorithms and their hardware implementations. Furthermore, achieving high-throughput, low-latency acceleration necessitates efficient hardware mapping. Our solution, AmigoLUT, enables the creation of lookup-table-based neural network architectures that efficiently map to FPGA fabrics.
CV: Ryan Kastner is a professor in the Department of Computer Science and Engineering at UC San Diego, where he holds the William Nachbar endowed chair. He received a Ph.D. in Computer Science at UCLA, a Master’s degree (MS) in engineering, and Bachelor’s degrees (BS) in Electrical Engineering and Computer Engineering, all from Northwestern University. He leads the Kastner Research Group whose current research interests fall into three areas: hardware acceleration, hardware security, and remote sensing. He is the co-director of the Wireless Embedded Systems Master of Advanced Studies Program. He also co-directs the Engineers for Exploration Program. He is the co-founder of Cycuity, which develops hardware security verification solutions. He is an IEEE Fellow.