Datum und Uhrzeit:
Ort: Conference room Mathematikon (INF 205, 5th floor)
Title: Challenges and Opportunities of Long Vector Architectures in HPC
Abstract: The European Union’s drive to establish a domestic HPC industry has led to considerable R&D around RISC-V and its vector extension, embodied in projects such as EPI or EUPilot. By leveraging long vector registers, RISC-V offers the potential for significant performance and energy efficiency gains. However, achieving scalable execution with long vectors is challenging. In this talk I will present our research on co-designing several CNN algorithms (direct, Winograd, im2col) with long vector architectures, using ARM-SVE and RISC-V as case studies. I will delve into the intricacies of exploiting long vector registers effectively and highlight the challenges in achieving scalable execution when using approaches such as autovectorization or compiler intrinsics.
In the second part of this talk I will discuss our work on SYCL as an alternative for generating multithreaded and vectorized code. SYCL, an explicitly parallel programming model, can facilitate the generation of long vectors, potentially improving performance and programmability. We are currently developing a microbenchmark to evaluate the parallelization and vectorization capabilities of various SYCL implementations, specifically when targeting multicore processors with vector units. I will present the status of this microbenchmark and discuss how the major two SYCL implementations (DPC++ and AdaptiveCPP) perform over a range of ARM and x86 systems.
CV: Miquel Pericàs is an Associate Professor at Chalmers University of Technology. Miquel holds a PhD from UPC-Barcelona which he received in 2008. From 2009 until 2011 he was a senior researcher at the Barcelona Supercomputing Center, where he worked on reconfigurable supercomputing. From 2012 until 2014 he was a JSPS postdoctoral fellow at the Tokyo Institute of Technology, where he developed profiling tools for task parallel runtime systems. He joined Chalmers University in 2014. His research interests cover parallel and heterogeneous programming models, and hardware/software codesign with a focus on SIMD architectures. Miquel is currently also responsible for two courses on parallel programming, development and optimization of HPC software. He is currently serving as the Chalmers representative in the RISC-V International foundation.